FPGA Design Security Solution Using MAX II Devices

This document provides a solution to prevent the FPGA designs from being copied. It allows the FPGA design to remain secure even if the configuration bitstream is captured. This is accomplished by disabling the functionality of the user design within the FPGA until handshaking tokens are passed to the FPGA from the MAX ® II device. The MAX II devices are selected for generating the handshaking tokens because they are non-volatile and retain their configuration data during power down. In addition, MAX II devices are the most cost-effective CPLDs for such applications. A reference design implementing this solution is also available.